PU6832N1
- Description
- The high-performance motor drive chip incorporates ME core and 8051 core. ME core integrates FOC, MDU,
LPF, PID and SVPWM modules that allow for automatic calculation of FOC or square-wave control by the
hardware for sensored/sensorless BLDC/PMSM motors. 8051 core is used for parameter configuration and routine
processing. Most of 8051 core instruction cycle takes 1T or 2T clock cycle(s). The dual cores work in parallel to
achieve high-performance motor control. The chip integrates high-speed operational amplifiers, comparators,
high-speed ADC, CRC, SPI, I2C, UART, Timers, built-in high-voltage LDO, which are suitable for FOC or squarewave based BLDC/PMSM motors.
- Features
-
◼ Power supply:
➢ High-voltage single-power supply mode: When VCC_MODE = 0, external power supply 5V~18V is
connected to VCC pin, and internal LDO supplies VDD5 voltage.
➢ Low-voltage single-power supply mode: When VCC_MODE = 1, external power supply 3V~5.5V is
connected to VDD5 pin, and VDD5 pin is shorted to VCC pin.
➢ Dual-power supply mode: When VCC_MODE = 1, external power supply 1 (5V~18V) is connected to
VCC pin, and external power supply 2 (5V) is connected to VDD5 pin.
◼ Dual core: 8051 core and ME core
◼ An instruction cycle mostly takes 1 or 2 system clock cycle(s)
◼ 16kB Flash ROM with CRC, self-program and code protection
◼ 256 bytes IRAM and 768 bytes XRAM
◼ ME: Core integrating PID module, FOC module, MDU auxiliary computing module and LPF module
◼ 16 interrupt sources with 4 configurable priority levels
◼ 22*GPIOs
◼ Timers:
➢ Timer1: Timer supporting square-wave drive timing control, automatic commutation, cycle-by-cycle
current limiting and Hall/BEMF-based position sensing
➢ Timer2: Timer supporting PWM output, measurement of duty cycle and period of input PWM wave,
measurement of the time of set PWM wave numbers, QEP decoding, tailwind/headwind detection, and
rotation direction and speed detection of step motor
➢ Timer3/Timer4: Timers supporting PWM output, and measurement of duty cycle and period of input
PWM wave Timer4 supports FG generation and Timer3 supports up to 48MHz input
➢ Systick Timer
➢ RTC
◼ Communication interfaces:
➢ 1*SPI
➢ 1*I2C
➢ 2*UARTs, supporting single-wire mode
◼ Dual-channel DMA: supporting data transmission via I2C/SPI/UART
◼ Analog Peripherals:
➢ 12-bit ADC, operating with 1μs conversion time and VDD5 selectable as reference voltage
➢ Number of ADC channels: 11
◼ Internal VHALF, with 1/2 VREF as the internal reference
➢ 3 standalone operational amplifiers, where the gain of AMP0 is configurable
➢ 3-channel analog comparator
➢ DAC: Single-channel 9-bit, single-channel 6-bit
◼ Built-in MOSFET driver: 3P3N pre-driver output
◼ FOC module supports single/dual/triple-shunt current sampling
◼ System clock
➢ Built-in 24MHz ± 2% high-speed oscillator
➢ Built-in 32.8kHz low-speed oscillator
◼ WDT
◼ LVD
◼ TSD
◼ Two-wire FICE protocol based in-circuit emulation
◼ AEC-Q100 Certification (Grade 1)
- Package
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QFN32
- Datasheet
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