PU6866Q1
- Description
- The high-performance motor drive chip incorporates ME core and 8051 core. ME core integrates FOC,
MDU, LPF, PID and SVPWM modules that allow for automatic calculation of FOC or square-wave control
by the hardware for sensored/sensorless BLDC motors. 8051 core is used for parameter configuration and
routine processing. Most of 8051 core instruction cycle takes 1T or 2T clock cycle(s). The dual cores work in
parallel to achieve high-performance motor control. The chip integrates high-speed operational amplifiers,
comparators, pre-driver, high-speed ADC, CRC, SPI, I2C, UART, LIN, CAN, Timers, built-in high-voltage
LDO, which are suitable for FOC or square-wave based BLDC motors
- Features
-
◼ Power supply:
➢ High-voltage single-power supply mode: When VCC_MODE=0, external power supply
6.5V~18V is connected to VCC pin, and internal LDO supplies VDD5 voltage.
◼ Dual-core: 8051 core and ME core
◼ An instruction cycle mostly takes 1 or 2 system clock cycle(s)
◼ 32kB Flash ROM with CRC, self-program and code protection
◼ 256 bytes IRAM and 3.75k bytes XRAM
◼ ME: Core integrating PID, FOC, MDU and LPF modules
◼ 16 interrupt sources that are configurable with 4 priority levels
◼ GPIO:
➢ PU6816Q1: 38 GPIOs
➢ PU6866Q1: 36 GPIOs
◼ Timers:
➢ Timer1: Timer designed for square-wave motor drive, supporting square-wave drive timing
control, automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position
sensing
➢ Timer2: Timer supporting PWM generation, measurement of duty cycle and period of input PWM
wave, measurement of the time of set PWM wave numbers, QEP decoding, tailwind/headwind
detection, and rotation direction and speed detection of step motor
➢ Timer3/Timer4: Timers supporting PWM generation, and measurement of duty cycle and period
of input PWM wave. Timer4 supports FG output and Timer3 supports up to 48Mhz input.
➢ Systick Timer
➢ RTC
◼ Communication interfaces:
➢ 1 SPI
➢ 1 I2C
➢ 2 UARTs, supporting single-wire mode
➢ 1 LIN, supporting single-wire mode
➢ 1 CAN
➢ Dual-channel DMA, supporting I2C, SPI, UART and LIN
◼ Analog peripherals:
➢ 12-bit ADC, operating with 1μs conversion time and internal VREF or external VREF
selectable as reference voltage
➢ Number of ADC channels: 16, where AD15 for internal sampling
➢ Built-in VREF, with 3V, 4V, 4.5V or VDD5 as the internal reference
➢ Built-in VHALF, with VREF/2, 1/4 VREF, 1/8 VREF or 25/64 VREF as the internal reference
➢ 4 standalone operational amplifiers, where PGA is configurable
➢ Analog comparators:
◆ PU6816Q1: 4-channel analog comparator
◆ PU6866Q1: 4-channel analog comparator
➢ DAC: Single-channel 9-bit, single-channel 6-bit
◼ Driver type
➢ PU6816Q1: PWM output
➢ PU6866Q1: Built-in MOSFET driver: 6N pre-driver output
◼ FOC module supports single/dual/triple-shunt current sampling
◼ System clock
➢ Built-in 24Mhz fast RC oscillator
➢ Built-in 32.8kHz slow RC oscillator
➢ Supports external 24Mhz crystal clock
➢ Supports external 32768Hz crystal clock
◼ WDT
◼ LVD
◼ Temperature sensor detect
◼ Two-wire FICE protocol based in-circuit emulation
◼ AEC-Q100 Certification (Grade 1)
- Package
-
QFN56
- Datasheet
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