PU6832L
- Description
- The high-performance motor drive chip incorporates ME core and 8051 core. ME core integrates FOC, MDU,
LPF, PID and SVPWM modules which allow for automatic calculation of FOC or square wave control by
hardware used for sensored/sensorless BLDC motors. 8051 core is used for parameter configuration and routine
processing. Most of 8051 core instruction cycle takes 1 or 2 clock cycle(s). The dual cores work in parallel to
achieve high-performance motor control. The chip integrates high-speed operational amplifiers, comparators, predriver, high-speed ADC, CRC, SPI, I2C, UART, LIN, Timers and high-speed LDO, which are essential for FOC
or square wave control based BLDC motors.
Package types of PU6832 include PU6832L (LQFP48), PU6832N (QFN32), PU6832S (SSOP24) and
PU6832F (QFN24).
- Features
-
◼ Power supply:
➢ High-voltage single-power supply mode: When VCC_MODE = 0, external power supply 5V~28V is
connected to VCC pin, and internal LDO supplies VDD5 voltage.
➢ Low-voltage single-power supply mode: When VCC_MODE = 1, external power supply 3V~5.5V is
connected to VDD5 pin, and VDD5 pin is shorted to VCC pin.
➢ Dual-power supply mode: When VCC_MODE = 1, external power supply 1 (5V~36V) is connected to
VCC pin, and external power supply 2 (5V) is connected to VDD5 pin.
◼ Dual core: 8051 core and ME core
◼ An instruction cycle mostly takes 1 or 2 system clock cycle(s)
◼ 16kB Flash ROM with CRC, self-program and code protection
◼ 256 bytes IRAM and 768 bytes XRAM
◼ ME: Core integrating PID module, FOC module, MDU auxiliary computing module and LPF module
◼ 16 interrupt sources with 4 configurable priority levels
◼ GPIO:
➢ PU6832L: 35 GPIOs
➢ PU6832N: 22 GPIOs
➢ PU6832S: 13 GPIOs
➢ PU6832F: 13 GPIOs
◼ Timer:
➢ Timer1: Timer designed for square wave motor drive, supporting square wave drive timing control,
automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position sensing
➢ Timer2: Timer supporting PWM output, measurement of duty cycle and period of input PWM wave,
measurement of the time of set PWM wave numbers, QEP decoding, tailwind/headwind detection
(RSD), rotation direction and speed detection of step motor
➢ Timer3/Timer4: Timers supporting PWM output, and measurement of duty cycle and period of input
PWM wave. Timer4 supports FG generation and Timer3 supports up to 48MHz input.
➢ Systick Timer
➢ RTC
◼ Communication interface:
➢ 1 SPI
➢ 1 I2C
➢ 2 UARTs, supporting single-wire mode
➢ 1 LIN
➢ Dual-channel DMA, supporting data transmission via I2C/SPI/ UART/LIN
◼ Analogue peripherals:
➢ 12-bit ADC, operating with 1μs conversion time and internal VREF or external VREF selectable as
reference voltage
➢ Number of ADC channels:
◆ PU6832L: 14
◆ PU6832N: 11
◆ PU6832S: 7
◆ PU6832F: 7
➢ Internal VREF, with configurable 3V, 4V, 4.5V or VDD5 (For EU6832N/S/F, only VDD5 can be
selected as internal reference)
➢ Internal VHALF (VREF/2) output (except PU6832S/F)
➢ 3 standalone operational amplifiers (PU6832S/F integrates AMP0 only), where the gain of AMP0 is
configurable
➢ 3-channel analog comparators
➢ DAC: Single-channel 9-bit, single-channel 6-bit
◼ Built-in 3P3N pre-driver
◼ FOC module supports single/dual/triple-shunt current sampling (PU6832S/F only supports single-shunt
current sampling)
◼ Built-in oscillator:
➢ 24MHz fast RC oscillator
➢ 32.8kHz slow RC oscillator
◼ WDT
◼ LVD
◼ TSD
◼ Two-wire FICE protocol based in-circuit emulation
- Package
-
LQFP48
- Datasheet
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